Synchronous operation within a circuit frequently appears asynchronous when viewed by another circuit having a different operating frequency. To achieve synchronization between circuits, some known devices have included "handshake" techniques wherein a formalized sequence of signal exchange is performed to synchronize the passing of a data word from one circuit to the other. Computer interfaces frequently utilize this technique. Another technique frequently employed is the use of a "flag" signal which is provided by the receiving device each time it is ready to accept data. The flag signal is removed each time data is received, but is again provided as soon as the receiving device is ready to receive the next data word.
The present invention provides for the transmission of data between a first and second device whenever logic state decoders within the first and second circuits simultaneously decode predetermined states. The simultaneous triggering of the logic state decoders within both the first and the second circuits causes a trigger pulse to occur on the trigger bus interconnecting the two circuits. Thus, the two circuits which are operating at different clock rates may be triggered simultaneously. Communication between the two devices may be synchronized irrespective of the clock rates of the first and second circuits. Also, the clock rates need not have specific harmonic or phase relationships to enable operation in accordance with the present invention.